What We Do

By Netronome | Feb 3, 2020

Netronome has developed a domain-specific architecture (DSA) that allows customers to build accelerators for networking and storage applications in data center and edge computing markets. This delivers efficient and high-performance heterogeneous solutions when paired with multi-core processors. Netronome’s technology can be purchased as hardened IP blocks to build custom SoC silicon devices, as SoC devices, SmartNICs or Smart Edge platforms and related software.

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Host Data Plane Acceleration Tutorial @ ACM SIGCOMM

By Simon Horman | Sep 05, 2018

Netronome was privileged to present a half day tutorial on host data plane acceleration at ACM SIGCOMM in Budapest on August 20, 2018. The tutorial introduced attendees to models for host data plane acceleration and provided an in-depth understanding of SmartNIC deployment models at hyperscale cloud vendors and telecom service providers. An emphasis was given throughout the tutorial to open source resources available for research and product development.

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Agilio SmartNIC Support in Red Hat Enterprise Linux 7.5 and the Performance Impact This Can Have for Users

By Simon Horman | May 08, 2018

What are AgilioⓇ CX SmartNICs? The Agilio CX SmartNICs are based on the Netronome NFP-4000 processor and are available in low profile PCIe and OCP v2 NIC form factors suitable for COTS servers. The NFP-4000 is a programmable 60 core processor with eight threads per core that transparently offloads and accelerates networking data planes. The flow processing cores have an instruction set that is optimized for networking. This ensures an unrivaled level of flexibility within the data plane while maintaining performance.

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Quentin Monnet

Quentin Monnet is a senior software engineer at Netronome, where he works on advanced technologies at the driver level, such as the software pieces of eBPF offload, and modestly contributes to several open source projects. Before joining Netronome, he was part of the Research & Development team at 6WIND, and was involved in European research projects that focused on fast, flexible and stateful packet processing for SDNs. Quentin holds a Ph.D. in Computer Science from Université Paris-Est, France.