The ODSA workgroup held its (first) Workshop on January 29th. We had a very good turnout - almost 70 attendees from 30 plus companies and with 12 speakers from 8 companies.
We organized the day into four sessions that focused on three broad topics:
- To understand how chiplets help in ASIC development it is important to fully understand and quantify the benefits of chiplets. The approach must be able to significantly reduce the cost and time to develop new ASICs and offer marked power-performance benefits relative to discrete solutions. The lowered costs and time will make it possible to develop custom ASICs for accelerator applications with market sizes too small to justify monolithic ASICs in advanced process nodes or die sizes too large for mature nodes. Conversely, multi-chiplet ASICs may incur a power and/or performance penalty relative to monolithic ASICs for the same function.
- The major portion of the day concentrated on discussions to develop and implement a PoC and prototype for the ODSA reference architecture and protocol stack. The sessions developed the SmartNIC as a target use case. The PoC is intended to be built with products currently in production, support a 100Gb/s linerate to support SmartNIC and machine learning applications. Presenters discussed inter-chiplet interconnect, packaging, system assembly and test and the architectural interface between chiplets. The prototype will be composed from chiplets with a more efficient inter-chiplet interconnect. The ODSA protocol stack will enable applications developed on the PoC to be ported more easily to the prototype.
These sessions prompted a lively discussion, with many exchanges focused on whether there is a clear need to develop the PoC, or if the group should just push directly to the prototype. One significant point raised was that the PoC is essential to resolving business and operational issues required to make chiplet-based products succeed in the marketplace. The prototype will implement a power-efficient inter-chiplet interconnect and complete architectural interface that are essential to making chiplets from multiple companies inter-operate and perform as though they are on a single die made by a single company.
- The business and operational issues were the focus of the last session of the day. Chiplets will require companies to work together in a workflow different from that used currently. The ODSA is unique relative to other proprietary chiplet-based efforts in that it is based on an open architectural interface. The last session was a lively discussion on the effort needed to develop and the advantages of an open ecosystem.
The workshop closed with a call to action on three specific workgroups - to build a prototype, identify business and operational issues and on standardization. Special thanks to Global Foundries/Avera Semi for hosting the workshop and to Avera Semi CEO/Global Foundries VP Kevin O’Buckley for getting us started in the morning. Stay tuned for the presentations and videos from the workshop. Engage with the community on the ODSA mailing list.
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Quentin Monnet
Quentin Monnet is a senior software engineer at Netronome, where he works on advanced technologies at the driver level, such as the software pieces of eBPF offload, and modestly contributes to several open source projects. Before joining Netronome, he was part of the Research & Development team at 6WIND, and was involved in European research projects that focused on fast, flexible and stateful packet processing for SDNs. Quentin holds a Ph.D. in Computer Science from Université Paris-Est, France.