Software-defined networks (SDNs) aim to produce more effective networks by increasing network flexibility and agility. P4 is a new declarative language to describe packet processing in SDNs. P4 builds on the work in the OpenFlow specifications by allowing protocol processing in the data plane to be specified programmatically. Researchers and developers can now develop and execute P4 code for data plane research on production hardware, Netronome Agilio intelligent server adapters (ISAs). The labs on the site Open-NFP offer developers an introduction to creating and running P4 code on Netronome intelligent server adapters (ISAs). To aid researchers in understanding and using the tools and labs at Open-NFP, we provide an overview of how P4 programs are developed and executed on Network Flow Processors (NFPs).
Specifically, P4 code is compiled to and executed on Netronome NFPs on Netronome ISAs. Figure 1 shows a simplified block diagram for Netronome NFPs, a family of programmable packet processing devices. Packets are input to/output from an NFP through network and host I/O interfaces. The specific line rates on the network interfaces vary across families of NFPs. The PCIe host interface enables interface virtualization with single root I/O virtualization (SR-IOV) support. Packet processing logic in the programmable engines and other logic elements in the processor route packets from any ingress port to any egress port. Developers can customize the functionality of the datapath by programming flow processing cores (shown in green in Figure 1).
Figure 1: Block Diagram of a Netronome Network Flow Processor
Figure 2 shows how a P4 dataflow is executed on an NFP. Match-action tables are the most common dataflow used to process packets. All ingress packets, from both network and host ports, are passed through a single match-action dataflow. All ingress to egress processing in both directions is described in one program, even in applications with directional dataflows such as server adapters. Control flow in the P4 program and the contents of the match-action tables and/or are used to separate packet flow in each direction. In addition to actions in P4, developers can implement custom actions in C when needed.
A P4 program is compiled into and loaded on programmable flow processing cores (in green in Figure 1), each of which can independently process packets. At any instant, the datapath processes multiple packets simultaneously. Packet flow management software ensures that a packet is processed through the tables in a program serially. Packet flow control also ensures that packets leave an NFP in the same order in which they entered it. The NFP also runs other software on some flow processing engines to manage the resources on the chip, perform low-level packet operations and caching logic to improve performance. The P4 code does not directly control the functionality of this additional logic. Using the NFP also requires driver software on the host. NFP management and host driver software are not affected by user-developed P4 code.
Figure 2: P4 mapped to an NFP