Careers

Netronome is a company founded by networking engineers and managed by industry experts with an accomplished and motivated workforce. Netronome offers an exciting and collaborative workplace where learning and working in a fast-paced environment awaits you. Netronome’s compensation package offers first class benefits that includes company paid group medical, dental, vision, disability, life insurance, Flex-Spending Accounts (FSA), 401(k), holiday pay, generous paid time off and stock options. Please send your resume to careers@netronome.com.

Netronome is an Equal Employment Opportunity/Affirmative Action Employer.

To see open positions in each location, please click the "N" button on the map.

World map

Senior Design Verification Engineer (Multiple Openings)

Boxborough, MA

Description

Netronome Systems, Inc. seeks Senior Design Verification Engineers (Multiple Openings) in Boxborough, MA to be responsible for ensuring the correct operations of the silicon designs produced by the Silicon Design Team.

Responsibilities
  • Create verification test plans for design units based on design/architectural specifications and understanding of the intended behavior of the chip design elements.
  • Create verification test benches from unit-level testing up to full-chip testing based on the assigned design blocks.
  • Develop new System Verilog components from bus functional models to test sequences as required by assigned test bench.
  • Write tests and test sequences that check the correct operation of the design block.
  • Debug design logic Register Transfer Level (RTL) to find root cause of any failing tests.
  • Write functional coverage to confirm that all intended elements of the design were tested.
  • Bring testing to final closure of functional coverage.
  • Work in a UNIX-like environment with software revision-control tools to maintain design verification code.
  • Develop tools and utilities to aid performance of the assigned blocks using scripting languages (Perl or TCL or Python).
Requirements
  • Must have a Master's degree (or foreign equivalent) in Computer, Electrical, or Electronics Engineering or a directly related field plus two (2) years of experience as an Electronics Engineer. Two years of experience must include: [i] two (2) years of design verification engineering experience, including two (2) years of experience with a design verification language (System Verilog or VMM or UVM); [ii] two (2) years of experience with a Register Transfer Level language (Verilog); and [iii] two years of experience with object-oriented software languages (Python or Perl).
  • Alternate requirement: Bachelor's degree (or foreign equivalent) in Computer, Electrical, or Electronics Engineering or a directly related field of study plus five (5) years of post-baccalaureate and progressively responsible experience as an Electronics Engineer (with the noted two (2) years of design verification and other engineering experience referenced above) will be accepted in lieu of a Master's degree (or foreign equivalent) in Computer, Electrical, or Electronics Engineering or a directly related field of study and two (2) years of experience as an Electronics Engineer (with the specific experience referenced above).

Send resume to J. Adams, Netronome Systems, 3159 Unionville Road, Suite 100, Cranberry Township, PA 16066.

Apply Now

Lead Design Verification Engineer

Boxborough

Description

Netronome is seeking highly motivated and experienced Design Verification Engineers to join our Silicon Engineering team to play a pivotal role in the creation of our next-generation highest-performance Network Processor SoC.

Responsibilities

Responsibilities will span the entire ASIC design verification process, including definition and architecture of state-of-the-art, UVM-based, coverage-driven design verification environments; serving as the verification box leader for a major functional block; overseeing and mentoring the DV efforts of fellow box team members; creating and reviewing verification test plans; code development of new SystemVerilog components from bus functional models to test sequences; to the final closure of complete functional coverage.

The role requires a solid understanding of coverage-driven design verification fundamentals, microprocessor and networking architectures, expertise in SystemVerilog code development, as well as proven debug and bug hunting skills.

The successful candidate will work in a collaborative group of highly experienced design verification engineers where knowledge is shared and mentored in strong team spirit. The candidate will work closely with the system architects and RTL designers in a tight-knit local team effort to ensure we deliver the highest-quality first-pass silicon to our eager customers.

Requirements

The ideal candidate would have the right combination of hardware, software, and communication skills including:

  • BS or MS degree in Electrical/Computer Engineering or equivalent.
  • 8+ years of silicon hardware design experience. Substantial Experience in coverage-driven design verification, networking protocols, system architecture and hardware design.
  • Expert-level understanding of OOP programming, pseudo-random verification techniques, and functional coverage.
  • Experience with UVM/OVM SystemVerilog, Python, Verilog and Mercurial is preferred.
  • Experience verifying 10G+ Ethernet, Interlaken, PCIe, microprocessors and complex cached memory subsystems is preferred.
  • Excellent problem solving and advanced debugging skills.
  • Good interpersonal skills, be a quick learner, and ready to contribute to a supportive team culture, wherever the need arises.
  • Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner.
  • Be self-motivated and able to work independently.
  • Possess clear written and verbal communication skills, being able to drive team efforts via written plans, specifications and schedules.
Apply Now

Principal Physical Design Engineer

Boxborough

Description

Netronome Systems is looking for a highly motivated individual to join our silicon design team. In this position you will play a key role in the development of high-performance Network Processor SoCs, with duties in the back-end implementation process.

Responsibilities

This position will have physical implementation responsibilities including floorplanning, partitioning, P&R, full-chip timing, chip assembly and cleanup. Additionally, you will contribute to synthesis/APR methodology and block implementation. This position will be working closely with Architects and RTL Designers to ensure that requirements are well-understood, coordinated, and subsequently executed to deliver high quality silicon.

Requirements

Specific qualifications for this position include:

  • Degree in Electrical & Electronic Engineering or Computer Science.
  • At least 10 years of experience.
  • Experience floorplanning, APR and signoff for large multi-million gate count projects.
  • Experience implementing powergrid and clock tree at the chip level. Additionally verifying the correctness of these for EM/IR Drop.
  • Experience in the chip assembly, DRC/LVS cleanup and GDSII generation for tapeout.
  • Experience in partitioning and timing budgeting.
  • Experience in block synthesis and APR.
  • Solid understanding of hardware design fundamentals, computer and networking architecture and VLSI principles.
  • Independent automation/parsing scripting experience in such languages as python/perl/tcl is required. Programming experience in C++/java/other is a plus.
  • Exposure to Verilog/VHDL coding and verification, CMOS circuits and digital design.
  • Must possess good interpersonal skills, be a quick learner and team player, and be ready to contribute wherever the need is.
  • Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner.
  • Good written and verbal communication skills and being able to deliver high quality output against deadlines are a must.
Apply Now

Principal DFT Design & Verification Engineer

Boxborough

Description

Netronome is seeking highly motivated experienced DFT Design and Verification Engineer to play a pivotal role in the implementation of a complex high-performance Network Processor SoC as part of our Boxborough Silicon Engineering Team.

Responsibilities

Responsibilities will focus in DFT implementation and design. Solid understanding of hardware design fundamentals and VLSI principles is required, as well as expertise in Verilog/VHDL coding, CMOS circuits and digital design.

Successful candidates will work closely with the system architects and other design and verification engineers to ensure that requirements are well understood, coordinated, and subsequently executed to deliver high quality silicon.

Requirements

The ideal candidate would have the right combination of technical and interpersonal skills including:

  • BS or MS degree in Electrical/Computer Engineering or equivalent.
  • 15+ years of silicon hardware design experience.
  • Substantial Experience in architecture and hardware design.
  • A history of successfully delivering good hardware design.
  • A strong ability to devise, document, and implement processes and methods in a well-organized, robust, and well-communicated manner.
  • Good understanding of DFT (Design for Test).
    • Scan Insertion
    • ATPG and Test Pattern Compression
    • Memory BIST
    • Logic BIST
    • IEEE 1149.1 and 1149.6 JTAG & Boundary Scan
  • Experience with Cadence Encounter Test.
  • Experience with debug of DFT Rule Checking and Test Coverage Issues.
  • Experience with Test Pattern Generation and verification.
  • Experience with implementation and verification of JTAG, MBIST, LBIST, etc.
  • Experience with scripting (Perl, TCL, or Python) and Makefiles is required.
  • Excellent problem-solving skills.
  • Be self-motivated and able to work independently
  • Possess good written and verbal communication skills, being able to deliver high quality output against aggressive schedule
Apply Now

Principal Logic Design Engineer

Boxborough

Description

Netronome is seeking highly motivated experienced Logic Design Engineers to join our Silicon Engineering Team to play a pivotal role in the implementation of a complex high-performance Network Processor SoC and supporting FPGAs.

Responsibilities:

Responsibilities will span the entire ASIC design process, including definition and architecture of new major functional blocks, development of new RTL design, and maintenance of existing RTL designs and integration of externally developed IP blocks. In addition, you will contribute to the logic verification, synthesis/APR and timing closure of RTL designs. Solid understanding of hardware design fundamentals, computer and networking architecture and VLSI principles is required, as well as expertise in Verilog/VHDL coding, CMOS circuits and digital design.

Successful logic design candidates will work closely with the system architects and other RTL design and verification engineers to ensure that requirements are well understood, coordinated, and subsequently executed to deliver high quality silicon. In addition, a principle logic design candidate will lead, direct, and mentor a small group of engineers to accomplish these goals.

Requirements

The ideal candidate would have the right combination of technical and interpersonal skills including:

  • BS or MS degree in Electrical/Computer Engineering or equivalent
  • 15+ years of silicon hardware design experience.
  • Substantial Experience in architecture and hardware design.
  • A history of successfully delivering good hardware design.
  • Expert-level understanding of silicon logic design and Verilog/VHDL.
  • Excellent problem-solving skills.
  • Experience with scripting (Perl, TCL, Python) and Makefiles is preferred
  • Good interpersonal skills, be a quick learner, and ready to contribute to a supportive team culture, wherever the need arises
  • Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner
  • Be self-motivated and able to work independently.
  • Be able to lead and motivate others to accomplish a common goal.
  • Possess good written and verbal communication skills, being able to deliver high quality output against aggressive schedule
Apply Now

QA Engineer

Pittsburgh

Description

The QA Engineer’s primary task is to perform whitebox and blackbox testing of the company’s hardware and software products. This individual will build software to expose defects in production level code at the component and feature level.

Responsibilities

· Review engineering technical specifications and participate in review meetings, when needed. Meet with developers to discuss technical aspects of features.
· Design and author test cases for assigned feature areas of a release.
· Design and build testing tools for automated unit, functional, and performance testing. Develop Linux and Windows based test applications.
· Define and execute test procedures.
· Work with developers on reproducing and researching defects.
· Track and manage defects on a day to day basis.
· Setup and maintain lab test environments.
· Provide QA Support for Field Trials of various products.
· Participate in all activities accordingly to ensure on-time deliverables are met including day-to-day planning and coordination with other QA Engineers and software/hardware developers.

Requirements

· Bachelor or Master’s degree in Computer Science, Electronics Engineering or related field.
· Experience testing and administering Linux and other Unix environments.
· Bash & Python scripting skills; Basic C/C++ programming skills in a Linux environment is also required.
· Knowledge of IP/Ethernet Networking and TCP/IP Protocol Stack; Experience configuring and operating switches and routers is a plus.
· Must work well in a team environment, be highly motivated and willing to learn new skills.
· Must have analytical, communication (both verbal and written) and technical skills.

Apply Now

Principal Software Engineer

Santa Clara

Description

Netronome Systems, Inc. seeks a Principal Software Engineer to work in our Santa Clara, CA office and to lead the team of software engineers responsible for the design, development, testing, debugging and support of high-performance embedded networking microcode written for a highly parallelized, multi-threaded, many-core hardware architecture, including microcode acceleration of Open vSwitch (OVS) by means of hardware offload of Linux Kernel flow classification, processing and caching, as well as other embedded systems software development. The candidate will participate in the design and implementation of new emerging networking standards in Software-Defined Networking (SDN), Network Functions Virtualization (NFV), and OVS, as well as ensure that architecture meets functional requirements and performance goals. The candidate will implement design in microcode and verify performance requirements using realistic network traffic loads while working with industry experts to ensure compatibility with the appropriate standards bodies' specifications.

Responsibilities

Must know (from any completed university-level coursework, seminars, workshops, or real-world, hands-on experience):

  • Embedded systems and embedded programming skills (C/C++);
  • Microcode software development for IXP/NFP hardware architecture (Microcode assembler);
  • Domain specific packet processing language;
  • One of the following scripting languages: bash, bourne, shell, Perl, or Python;
  • Development/debugging on Linux platform (revision control systems, build systems, troubleshooting and debugging);
  • Major network protocols (IP, ARP, ICMP, TCP, and UDP); and
  • High-performance network device internals (parsing, classifying, filtering, traffic forwarding, load balancing, packet manipulation, and flow cache acceleration).
Requirements
  • Must have a Master's degree (or foreign equivalent) in Computer Science, Computer Engineering, Information Technology, or directly related field; plus three (3) years of software engineering experience.
  • Alternate requirement: Bachelor's degree (or foreign equivalent) in Computer Science, Computer Engineering, Information Technology, or a directly related field of study plus five (5) years of post-baccalaureate and progressively responsible years of software engineering experience.

Send resume to J. Adams, Netronome Systems, 3159 Unionville Road, Suite 100, Cranberry Township, PA 16066.

Apply Now

Software QA Engineer

Cape Town/Centurion

Description

The QA Engineer's primary task is to perform white-box and blackbox testing of the company's hardware and software products. This individual will build test software to expose API defects in production level code as well as defects at the component and feature levels.

Responsibilities
  • Review engineering technical specifications and attend review meetings
  • Meet with developers to discuss technical aspects of features
  • Design and author test cases for assigned feature areas of a release
  • Design and build testing tools for automated unit, functional, and performance testing
  • Develop Linux and Windows based test applications to exercise and validate firmware and embedded software
  • Define and execute test procedures
  • Work with developers on reproducing and researching defects
  • Track and manage defects on a day to day basis
  • Setup and maintain lab test environments
  • Provide QA Support for Field trials of various products
  • Participate in all activities accordingly to ensure on-time deliverables are met including day-to-day planning and coordination with other QA engineers and software/hardware developers
Requirements
  • MS degree in Computer Science or Computer Engineering or a BS Degree and two years of experience
  • C/C++ programming and scripting (Perl/Python/Shell) experience
  • Working experience in Linux open source development (gcc, g++, make)
  • Networking Protocols (TCP/IP, UDP, SSL) experience
Apply Now

Software Engineer

Cape Town/Centurion

Description

The Software Engineer will be responsible for the design, development, debugging, testing and support of high-performance networking software. Contributions to include embedded and/or system software development.

Responsibilities
  • Construct data structure and algorithms
  • Write quality code
  • Explore innovative technical solutions
  • Test and debug code
  • Contribute to feature definition and design
  • Examine feature feasibility and estimate development time
  • Work with the team to meet project deadlines
Requirements
  • Master’s or Bachelor’s degree in Electronics Engineering, Computer Engineering or Computer Science
  • Proficiency with embedded/systems programming skills (C/C++) and scripting languages (e.g. bash, bourne shell, Python)
  • Experience with development and debugging on a Linux platform - gcc/g++, revision control systems, build systems, troubleshooting, debugging and profiling tools
  • Experience with embedded systems and embedded software development
  • Experience with multi-threaded programming
  • Knowledge of major network protocols such as TCP, IP, HTTP, Ethernet, ARP, ICMP, UDP as well as typical network device operations such as parsing, classifying, filtering and forwarding traffic
  • Knowledge of implementation of network protocols and device driver/network stack internals for Linux and/or other embedded operating systems
  • Familiarity with software development methodology best practices and processes such as waterfall, agile, and software release cycles
Apply Now

Software Engineer (Kernel Development)

Description

Netronome is a proud member of the Linux kernel community. We have participated in a number of exciting new efforts in the networking stack. Our kernel engineers are also participating in development of embedded products. Netronome is currently seeking Software Engineers. The Software Engineer will be responsible for the design, development, debugging, testing and support of high-performance networking software. Contributions to include embedded and/or system software development.

Responsibilities

The Software Engineer will be expected to work with other software developers and hardware developers at Netronome to design and develop host code and associated drivers (for Netronome SmartNICs) for popular server operating systems e.g. Linux. Most, if not all of the code developed is expected to be submitted upstream to the Linux (or equivalent) kernel mailing lists. The Software Engineer will construct data structure and algorithms; write quality code; explore innovative technical solutions; test and debug code; contribute to feature definition and design; examine feature feasibility and estimate development time; work with team to meet deadlines. Performing any and all such other professional duties or tasks as may be required.

Requirements

• Master’s or Bachelor’s degree in Electronics Engineering, Computer Engineering or Computer Science

• Experience working with the upstream community

• Knowledge of major network protocols such as TCP, IP, HTTP, Ethernet, ARP, ICMP, UDP

• Very good understanding of Linux internals

• Experience with CPU and memory architectures

• Experience developing high quality C code

• Experience working on device drivers

• Knowledge of basic bash, Python

• Experience with upstreaming patches preferred

• Experience working with Linux networking stack preferred

• Experience with advanced networking knowledge preferred

• Experience working on Linux-based embedded systems preferred

• Compiler knowledge preferred

• Experience working with complex architectures and heterogeneous systems preferred

• Exposure to eBPF preferred

• Experience working with ARM architecture preferred

Benefits

• Upstream work

• Flat management

• Appreciation for employee initiatives

• Attending conferences

Apply Now