Careers
Netronome is a company founded by networking engineers and managed by industry experts with an accomplished and motivated workforce. Netronome offers an exciting and collaborative workplace where learning and working in a fast-paced environment awaits you. Netronome’s compensation package offers first class benefits that includes company paid group medical, dental, vision, disability, life insurance, Flex-Spending Accounts (FSA), 401(k), holiday pay, generous paid time off and stock options. Please send your resume to careers@netronome.com.
Netronome is an Equal Employment Opportunity/Affirmative Action Employer.
To see open positions in each location, please click the "N" button on the map.
Principal DFT Design & Verification Engineer
Description:
Netronome is seeking highly motivated experienced DFT Design and Verification Engineer to play a pivotal role in the implementation of a complex high-performance Network Processor SoC as part of our Boxborough Silicon Engineering Team.Responsibilities:
Responsibilities will focus in DFT implementation and design. Successful candidates will work closely with the system architects and other design and verification engineers to ensure that requirements are well understood, coordinated, and subsequently executed to deliver high quality silicon.Requirements:
The ideal candidate would have the right combination of technical and interpersonal skills including:- Bachelor or Master degree in Electrical/Computer Engineering or equivalent;
- 15+ years of silicon hardware design experience;
- Solid understanding of hardware design fundamentals and VLSI principles, as well as expertise in Verilog/VHDL coding, CMOS circuits and digital design;
- A history of successfully delivering good hardware design;
- A strong ability to devise, document, and implement processes and methods in a well-organized, robust, and well-communicated manner;
- Good understanding of DFT (Design for Test) - Scan Insertion, ATPG and Test Pattern Compression, Memory BIST, Logic BIST, IEEE 1149.1 and 1149.6 JTAG & Boundary Scan;
- Experience with Cadence Encounter Test;
- Experience with debug of DFT Rule Checking and Test Coverage Issues;
- Experience with Test Pattern Generation and verification;
- Experience with implementation and verification of JTAG, MBIST, LBIST, etc.;
- Experience with scripting (Perl, TCL, Python) and Makefiles;
- Excellent problem-solving skills;
- Good interpersonal skills, be a quick learner, and ready to contribute to a supportive team culture, wherever the need arises;
- Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner;
- Be self-motivated and able to work independently;
- Possess good written and verbal communication skills, being able to deliver high quality output against aggressive schedule.
Principal Design Verification Engineer
Description:
The Principal Design Verification Engineer will be responsible for ensuring the correct operation of the silicon designs produced by the Logic Design Team.Responsibilities:
The essential functions will consist of, but not be limited to the following:- Reading the Architectural Specification and understanding the intended behavior of the chip design elements.
- Creating Verification Test Plans for their design units based on the Design Specifications.
- Creating verification testbenches from unit level testing up to full-chip based on the design block they are assigned.
- Developing new SystemVerilog components from bus functional models to test sequences as required by their testbench.
- Writing tests and test sequences that check the correct operations of the design block.
- Debugging the design logic RTL to find the root cause of any failing tests.
- Writing functional coverage coverpoints to confirm all the intended elements of the design were tested.
- Bring their testing to the final closure of complete functional coverage.
Requirements:
- Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering or equivalent;
- 15+ years of design verification experience;
- Substantial Experience in coverage-driven design verification, networking protocols, system architecture and hardware design;
- A history of successfully creating world-class DV environments that deliver first-pass bug-free hardware;
- Expert-level understanding of OOP programming, pseudo-random verification techniques, and functional coverage;
- Experience with UVM/OVM SystemVerilog, Python, Verilog and Mercurial is preferred
- Experience verifying 10G+ Ethernet, Interlaken, PCIe, microprocessors and complex cached memory subsystems
- Packet switching SW, assembly/firmware microcoding (IXP, ARM), and post-silicon validation experience is a plus;
- Excellent problem solving and advanced debugging skills;
- Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner;
- Be self-motivated and able to work independently;
- Enthusiasm toward driving and embracing the latest in verification methodologies, techniques and languages in a collaborative group setting is seen as a key value.
Principal DFT Design & Verification Engineer
Description:
Netronome is seeking highly motivated experienced DFT Design and Verification Engineer to play a pivotal role in the implementation of a complex high-performance Network Processor SoC as part of our Boxborough Silicon Engineering Team.
Responsibilities:
Responsibilities will focus in DFT implementation and design. Successful candidates will work closely with the system architects and other design and verification engineers to ensure that requirements are well understood, coordinated, and subsequently executed to deliver high quality silicon.
Requirements:
The ideal candidate would have the right combination of technical and interpersonal skills including:
- Bachelor or Master degree in Electrical/Computer Engineering or equivalent;
- 15+ years of silicon hardware design experience;
- Solid understanding of hardware design fundamentals and VLSI principles, as well as expertise in Verilog/VHDL coding, CMOS circuits and digital design;
- A history of successfully delivering good hardware design;
- A strong ability to devise, document, and implement processes and methods in a well-organized, robust, and well-communicated manner;
- Good understanding of DFT (Design for Test) - Scan Insertion, ATPG and Test Pattern Compression, Memory BIST, Logic BIST, IEEE 1149.1 and 1149.6 JTAG & Boundary Scan;
- Experience with Cadence Encounter Test;
- Experience with debug of DFT Rule Checking and Test Coverage Issues;
- Experience with Test Pattern Generation and verification;
- Experience with implementation and verification of JTAG, MBIST, LBIST, etc.;
- Experience with scripting (Perl, TCL, Python) and Makefiles;
- Excellent problem-solving skills;
- Good interpersonal skills, be a quick learner, and ready to contribute to a supportive team culture, wherever the need arises;
- Be able to quickly comprehend new challenges and plan the necessary tasks to meet overall objectives in a timely manner;
- Be self-motivated and able to work independently;
- Possess good written and verbal communication skills, being able to deliver high quality output against aggressive schedule.
Silicon Design Engineer
Description:
Netronome Systems, Inc. seeks a Silicon Design Engineer to work in their Boxborough, MA location and to be responsible for Register Transfer Level ("RTL") development, maintenance of existing RTL, and integration of externally developed Internet Protocol ("IP") blocks.
Responsibilities:
- Contribute to logic verification, synthesis.
- Automatic Place and Route ("APR"), and timing closure of RTL designs. .
- Provide testbench development (stimulus generators, monitors/checkers, bus functional models, random test generation modules and simulation control), unit and system-level verification (test-plan development, test writing, simulation/debugging and code/functional coverage), as well as automation of steps where applicable.
Requirements:
- Must have a Master's degree in Computer or Electrical Engineering or a directly related field. Will also accept a Bachelor's degree or foreign equivalent in Computer or Electrical Engineering or a directly related field of study plus five (5) years of post-baccalaureate/progressively responsible design engineering experience.
- Must know (through academic coursework or work experience):
- Logic design and debugging with Verilog/ VHDL or System Verilog;
- Computer or networking architecture;
- An object-oriented programming language (C++ or Java Or Python); and
- A UNIX- like environment.
Send resume to J. Adams, Netronome Systems, 3159 Unionville Road, Suite 100, Cranberry Township, PA 16066.
Lead Software Engineer
Description:
The Lead Software Engineer will work as part of a team responsible
for the Board Support Package (BSP) and related infrastructure
software for Netronome NFP family of network processors, boards and systems.
Responsibilities:
- Support NFP family (NFP-6000, NFP-4000, NFP-3800, NFP-5000 and upcoming designs) BSP and validation software;
- Lead an area of work – this position will design, implement and support said area;
- Support hardware team in new designs and advise/propose improvements;
- Bring up the hardware throughout the hardware lifecycle (prototypes, pilot, production) and work with early access customers;
- Support teams within company (manufacturing and applications);
- Help customers with issues depending on the area;
- Lab Support (e.g. traffic generator and networking equipment, datapath).
Requirements:
- Bachelor’s degree in Electronics Engineering, Computer Engineering, Computer Science or related field required (Master’s degree preferred);
- Must have strong interest in coding, problem solving and working with hardware;
- Must have 5+ years of C programming skills;
- Must have a strong knowledge of embedded systems and computer architecture;
- Demonstrated interest in systems, CPUs, Microcontrollers, FPGAs and related areas is a strong plus.
Hardware Engineer
Description:
Netronome is seeking a Hardware Engineer who will be responsible for developing network and security products for the industry leading Netronome Flow Processer product line.
Responsibilities:
This position will be responsible for hardware system and board level design and design support activities, with a particular emphasis on high-speed digital and SerDes design. This position will interact with software and manufacturing teams to design complete devices, and customer support of these devices.
Requirements:
- Bachelor’s Degree in Electrical Engineering or equivalent;
- Working knowledge of schematic capture, power and signal integrity analysis, and configuration management tools;
- VHDL and/or Verilog design experience;
- PCB design with a speed of 100 MHz minimum;
- Working knowledge of DDR3, PCI Express, High Speed Network Serdes;
- Hands-on test and debug experience with oscilloscopes and similar test equipment in a lab environment;
- Modelsim or other HDL simulation tools experience a plus;
- Computer Networking experience a plus;
- Excellent communication and documentation skills;
- Ability to interact with end customers professionally.