Netronome Announces Open Chiplet Architecture for Advanced SoC Designs

October 31, 2018

Democratizes Production of Integrated Silicon Products for High-Performance Machine Learning, Security and Networking Applications by Enabling Integration of Best-of-Breed Components While Significantly Reducing Development Costs and Accelerating Time to Revenue

Calls for Industry Collaboration and Design Contribution in the Open Domain-Specific Accelerator (ODSA) Workgroup Jointly Initiated by Seven Silicon Companies

LINLEY FALL PROCESSOR CONFERENCE, SANTA CLARA, CA, October 31, 2018 – Netronome, a leader in high-performance intelligent networking solutions, today announced an open architecture for domain-specific accelerators designed to significantly reduce the burgeoning cost of silicon development as demanded by modern data center server, edge computing and automotive applications. Decades of progress with general-purpose CPUs has slowed while performance requirements of workloads have catapulted, driving significant demand in domain-specific accelerators. With current approaches applied to developing and manufacturing domain-specific accelerator silicon, only the largest companies serving the highest volume markets can sustain the needed investment. Netronome is collaborating with six leading silicon companies, Achronix, GLOBALFOUNDRIES, Kandou, NXP, Sarcina and SiFive, to develop an open architecture and related specifications for developing chiplets that promise to reduce silicon development and manufacturing costs.

The silicon industry is undergoing a sea change as a result of multiple forces. Firstly, the demise of Moore’s Law and secondly, the growth of compute-intensive specialized applications (e.g., machine learning, security, networking) are driving the need for domain-specific architectures that drastically impact the economics of silicon development and ROI. Thirdly, the increasing size and complexity of silicon adversely impact development costs and manufacturing yields, and finally, requirements such as significantly reduced latency, form factor and power requirements are becoming critical (e.g., with edge computing). 

The open domain-specific accelerator architecture being developed in the ODSA Workgroup enables the chiplet-based silicon design to be composed using best-of-breed components such as processors, accelerators, and memory and I/O peripherals using optimal process nodes. The open architecture will provide a complete stack of components (known good die, packaging, interconnect network, software integration stack) that lowers the hardware and software costs of developing and deploying domain-specific accelerator solutions. Implementing open specifications contributed by participating companies, any vendor’s silicon die can become a building block that can be utilized in a chiplet-based SoC design.

“The end of Moore’s Law will increase the use of domain-specific accelerators to meet power-performance requirements in cloud infrastructure, network infrastructure and IoT/wireless edge applications,” said Bob Wheeler, principal analyst, The Linley Group. “With its modular approach, the open domain-specific accelerator architecture could change the chiplet paradigm from single-vendor solutions to a world of choice, thereby enabling OEMs and operators to develop and deploy advanced SoC solutions.”

“Netronome’s domain-specific architecture as used in its Network Flow Processor (NFP) products has been designed from the ground up keeping modularity, and economies of silicon development and manufacturing costs as top of mind,” said Niel Viljoen, founder and CEO at Netronome. “We are extremely excited to collaborate with industry leaders and contribute significant intellectual property and related open specifications derived from the proven NFP products and apply that effectively to the open and composable chiplet-based architecture being developed in the ODSA Workgroup.”

“The use of AI and the need for power-efficient, high-throughput parallelism is driving the growth of accelerators. However, the high cost and complexity of accelerator development is a major factor restraining growth,” said Steve Mensor, vice president of marketing at Achronix. “We are delighted to join and bring our embedded FPGA technology to the ODSA Workgroup to enable customers to bring open, cost-efficient accelerator products to market.” 

“To meet current and future growth demands, network providers need a more efficient approach to satisfy the needs of a wide range of data center applications,” said Kevin O'Buckley, general manager ASIC Business Unit at GLOBALFOUNDRIES. “Our collaboration efforts with the ODSA Workgroup ensure an additional option to enable data center SoC accelerator technology supporting applications from deep learning for artificial intelligence to next-generation 5G networks.”

“Kandou’s Glasswing USR SerDes was designed to be the enabling interface for heterogeneous chiplet architectures in a shared MCM package,” said Amin Shokrollahi, founder and CEO at Kandou. “With unprecedented bandwidth and ultra-low power, Glasswing enables companies to quickly and efficiently build flexible yet optimized solutions for workload-specific applications. Kandou supports the ODSA Workgroup and delivering Glasswing as a critical component.”

“NXP strongly supports development of chiplet technology in support of domain-specific acceleration for multiple markets,” said Sam Fuller, director of marketing at NXP. “NXP is pleased to join the ODSA Workgroup and provide its Multicore Arm® SoC solutions to enable low-power, low-latency, open accelerator solutions that deliver greater cost and performance efficiencies.”

“Sarcina provides complex high-speed and high pin-count packaging solutions for leading fabless semiconductor companies,” said Larry Zu, Ph.D., president at Sarcina Technology LLC. “We are pleased to join the ODSA Workgroup and offer a packaging service for the open data center accelerator prototype that can accelerate the time-to-package while lowering the total cost.”

“A 'one size fits all’ architecture approach to data center workloads will not deliver the required performance and efficiency,” said Dr. Naveed Sherwani, president and CEO at SiFive. “We are pleased to be a member of the ODSA Workgroup and look forward to SiFive’s leading RISC-V Core IP being available in chiplet form, potentially via our silicon capabilities, to enable customers to create open, heterogeneous, best-in-class accelerators at low cost.”

How to contribute:
The ODSA is in the genesis of its formation and is open for contributions and accepting new members to build a robust ecosystem. Companies and industry partners wishing to learn more, participate and become an integral part of the ODSA Workgroup can inquire further at odsa@netronome.com.  

Supporting Resources
  • Specifications and contributions within the ODSA Workgroup relate to open and standards-based connectivity between chiplets. They are in the following areas:
    • Application layer -
      • Open source firmware infrastructure and host software for accelerator use and host integration: new open IP/specification
    • Memory management layer -
      • Protocols for synchronous memory traffic based on an open protocol leveraging CCIX and TileLink: existing open standard
      • Protocols for asynchronous memory traffic such as Instruction-driven Switch Fabric (ISF): new open IP/specification
    • Link layer -
      • A light link layer protocol based on and leveraging PCIe and TileLink: existing open standard
    • Multiple PHY layer interfaces -
      • Based on and leveraging PCIe XSR: existing open standard
      • Based on USR SerDes, and Bunch of Wires (BoW) abstracted through an open, common interface such as PCIe PIPE
    • Substrate layer -
      • Based on organic substrate packaging and interconnect: new open IP/specification
  • Read the “Open-DSA” Blog
  • Learn more about Netronome IP Blocks
About Netronome
Netronome designs and markets server networking and coprocessor platforms, including its market leading silicon accelerators, boards and software, enabling customers to increase the efficiency and security of their modern data center infrastructure. Netronome products reduce the total cost of ownership (TCO) and drive significantly higher server performance resulting in increased revenue per server for service providers. The evolution of lower cost and standards-based software-defined networking implemented in servers has enabled rapid innovation and transformed the economics for data center compute and networking. However, such new deployments continue to face significant scaling and efficiency challenges with the rapid move from 10GbE to 25/50GbE and higher bandwidth network infrastructure requirements. Netronome brings back much-needed scale and efficiency, without compromising flexibility, simplicity or the speed of innovation needed in today’s cloud networks running businesses of all sizes. Netronome has a global footprint and is headquartered in Santa Clara, CA. To learn more about Netronome and its products, please visit www.netronome.com.

Netronome, the Netronome logo, and Agilio are trademarks or registered trademarks of Netronome Systems, Inc. All other trademarks mentioned are registered trademarks or trademarks of their respective owners in the United States and other countries.

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